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Sponsors
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Technical Sponsor
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The 35th edition of Great Lakes Symposium on VLSI (GLSVLSI) will be held as an
in-person conference.
Original, unpublished papers describing research in the general areas of VLSI and hardware
design are solicited.
Please visit http://www.glsvlsi.org/ for more information.
Keynote Speakers
Title: Big AI for Small Devices
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Title: Generative AI for Analog/RF IC Design Automation
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Title: Design Automation for Quantum Computing
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Dr. Hai (Helen) Li
Marie Foote Reel E’46 Distinguished Professor and Department Chair
Department of ECE
Duke University, USA
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Dr. David Z. Pan
Professor
Department of ECE
The University of Texas at Austin, USA
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Dr. Prabhat Mishra
UF Research Foundation Professor
Department of CISE
University of Florida, USA
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Title: Rajun Cajun SoC Design: From Algorithmic Intelligence to Hyper-embedded Computing
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Title: Bio-Inspired Robotics: Advancements in Agility, Assistive Technologies, and Human-Robot Interaction
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Title: Solving the Memory Wall in the AI Era
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Dr. Martin Margala
Director, School of Computing and Informatics
Endowed Chair of Computer Science and Eminent Scholar
Fulbright Distinguished Chair
University of Louisiana at Lafayette, USA
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Dr. Pinhas Ben-Tzvi
Professor of Mechanical Engineering and Electrical and Computer Engineering
Director, VT Robotics and Mechatronics Lab
Virginia Tech, Blacksburg, VA
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Dr. Chia-Lin Yang
Distinguished Professor
Department of CSIE
National Taiwan University (NTU), Taiwan
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Program Tracks
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VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures,
embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal systems,
NoC,
SoC, IoT, interconnects, memories, bio-inspired and neuromorphic circuits and systems,
BioMEMs,
lab-on-a- chip, biosensors, CAD tools for biology and biomedical systems, implantable and
wearable devices,
machine-learning for VLSI design and optimization.
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IoT and Smart Systems: circuits, computing, processing, and design of IoT and smart
systems such as smart cities, smart healthcare, smart transportation, smart grid etc.;
cyber-physical systems,
edge computing, machine learning for IoT, TinyML.
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Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic
synthesis,
simulation and formal verification, layout, design for manufacturing, algorithms and
complexity analysis,
physical design (placement, route, CTS), static timing analysis, signal and power integrity,
machine learning for CAD and EDA design.
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Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing,
reliability, robustness, static/dynamic defect-
and fault-recoverability, variation-aware design, learning-assisted testing.
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Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing,
approximate and stochastic computing,
sensor and sensor networks, post CMOS VLSI.
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Hardware Security: trusted IC, IP protection, hardware security primitives, reverse
engineering, hardware Trojans,
side-channel analysis, CPS/IoT security, machine learning for HW security.
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VLSI for Machine Learning and Artificial Intelligence: hardware accelerators for
machine learning, novel architectures
for deep learning, brain-inspired computing, big data computing, reinforcement learning,
cloud computing for Internet-of-Things (IoT) devices.
Microelectronic System Education Workshop
The Workshop on Microelectronic Systems Education is a one-day in-person only event focusing on
pedagogical innovations in all microelectronics-related topics such as materials, processing,
device theory, ASIC, FPGA, multicore, GPU, TPU, novel curricula and laboratories, AI/Large
Language Models/Machine Learning in electronics education, assessment methods, distance
learning, textbooks, and design projects, industry and academic collaborative programs and
teaching methods at all levels (K-12, 2-year & 4-year college).
Important Dates:
Paper submission deadline:
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March 17, 2025 (11:59pm EST)
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Acceptance Notification:
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April 30, 2025
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Camera-Ready:
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May 15, 2025
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Guidelines
Paper Submission: Authors are invited to submit full-length 6-page,
original, unpublished papers along with an abstract of at most 200 words.
Submissions exceeding 6 pages are permitted but must not exceed 8 pages in total.
Each additional page beyond 6 will incur an extra fee upon acceptance for publication.
To enable blind review, the author list should be omitted from the main document.
Previously published papers or papers currently under review for other conferences/journals
should NOT be submitted and will not be considered. Electronic submission in PDF format to the
https://easychair.org/conferences/?conf=glsvlsi25
website is required. Author and contact information (name, affiliation, mailing address,
telephone, fax, e-mail)
must be entered during the submission process.
Paper Format (camera-ready): Submissions should be in camera-ready two-column format,
following the ACM proceedings specifications
located at: ACM Template
and the classification system detailed at: ACM 2012 Class.
For Overleaf users, please find the following template:
ACM Proceedings Template - Overleaf.
For LaTeX users, please find the following ZIP file: acmart-primary.zip.
For Word users, please find the following template: interim-layout.docx.
Paper Publication and Presenter Registration: Papers will be accepted for regular
or poster presentation at the symposium. Every accepted paper MUST have at least one author
registered to the symposium by the time the camera-ready paper is submitted; at least one of
the authors is also expected to attend the symposium and present the paper.
By submitting your article to an ACM Publication, you are hereby acknowledging that you and your
co-authors are subject to all ACM Publications Policies, including ACM's new Publications Policy
on Research Involving Human Participants and Subjects. Alleged violations of this policy or any
ACM Publications Policy will be investigated by ACM and may result in a full retraction of your
paper, in addition to other potential penalties, as per ACM Publications Policy.
Please ensure that you and your co-authors obtain an ORCID ID, so you can complete the
publishing process for your accepted paper. ACM has been involved in ORCID from the start and we
have recently made a commitment to collect ORCID IDs from all of our published authors. The
collection process has started and will roll out as a requirement throughout 2022. We are
committed to improve author discoverability, ensure proper attribution and contribute to ongoing
community efforts around name normalization; your ORCID ID will help in these efforts.
This site is maintained by:
GLSVLSI 2025 Webmaster
Fang Qi (fqi2@tulane.edu) and Md. Ahsan Habib (mhabib@tulane.edu)
Tulane University
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