GLSVLSI 2011
Ecole Polytechnique Federale de Lausanne (EPFL) Campus
Lausanne, Switzerland
May 2-4 20
11
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GLSVLSI 2011, EPFL, Lausanne, Switzerland

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PROGRAM SCHEDULE

KEYNOTE ADDRESS 1 - Monday, May 2nd, 8:30-9:30

"Sensing and Sensibility of Energy Use in Modern Mixed-Use Buildings"

Prof. Rajesh Gupta UCSD, USA

Presentation Slides (PDF) - NEW

 

KEYNOTE ADDRESS 2  - Tuesday, May 3rd, 7:30-8:30

"Waiting for the Post-CMOS Godot"

Dr. Sani R. Nasif, IBM, USA

Abstract: We all eagerly await the dawn of a new post-cmos era, which will enable us to make ever more complex systems with lower power, higher performance, lower cost, and other magical properties. The reality however, is that post is more likely going to be "very post"...And that we will need to maintain our current CMOS scaling trend for at least three or four more nodes before any new technology will emerge. While waiting and scaling, we will face a number of challenges, increasing technology complexity, reducing investment in R&D as fewer and fewer companies scale forward, and increasing fail rates from ever more variable. This keynow will examine these issues, pay careful attention to circuit resilience in future technologies, and propose some research topics to help keep CMOS healthy.

Presentation Slides (PDF) - NEW


Technical Sessions 1, 2, 3, 4, 5, 8 and 10 will be Polyvalente. The rest will be in Polyd˘me.

Registrations, Welcome by Chairs, Keynote Address 1 and 2, Coffee breaks and Poster session 1 and 2 will be in Polyd˘me.

Session 7 CAD will be in CM1368.


Paper IDs shown. (S) denotes a short paper.

Click here for the detailed PDF Version (UPDATED April 26th, 2011)

 

Day 1 - Monday, May 2nd

7:00-8:00 Registration - Polyd˘me
8:00-8:30 Welcome by Chairs - Polyd˘me
8:30-9:30 KEYNOTE ADDRESS 1 - Polyd˘me

"Sensing and Sensibility of Energy Use in Modern Mixed-Use Buildings"

Prof. Rajesh Gupta (UCSD, USA)

9:30-10:00 Coffee Break - Polyd˘me
10:00-12:00 Session 1 - Polyvalente Special Session 1 - Polyd˘me
Emerging Technologies - Chaired by Mircea Stan SMECY : programming tool 
191, 207, 215 chains for multi-core platforms - Chaired By:
Donatella Sciuto
115 (S), 196 (S)  
12:00-13:15 Lunch - Parmentier restaurant
13:15-14:15 Poster Session 1: 121, 96, 141, 154, 88, 6, 192, 92, 30 - Polyd˘me
     
     
15:00-18:00 Visit to the Olympic Museum

 


 

 

Day 2 - Tuesday, May 3rd 

7:30-8:30 KEYNOTE ADDRESS 2 - Polyd˘me

Title: Waiting for the Post-CMOS Godot

Dr. Sani R. Nasif, IBM, USA
 

8:30-10:30 Session 2 - Polyvalente Special Session 2 - Polyd˘me
NoCs and Routing - Chaired By: Martino Ruggiero Magnetic memory (MRAM) A New
102, 148, 203 Area for 2D and 3D SoC/SiP Design
Chaired By: Lionel Torres
36 (S), 156 (S)   

10:30-11:00

Coffee Break - Polyd˘me
11:00-13:00 Session 3 - Polyvalente Special Session 3 - Polyd˘me
Circuit Design I - Chaired By: Andreas Burg Quantum Devices and
55, 68, 82 Optical Computing - Chaired By: Braulio Garcia-Camara
59 (S), 91 (S), 176 (S)  
13:00-14:00 Lunch - Parmentier restaurant
14:00-16:00 Session 4 - Polyvalente Special Session 4 - Polyd˘me
Low Power and Temperature - Chaired By:
Ayse K. Coskun
Hardware Security in VLSI - 
Chaired By: Wayne Burleson
  75, 97

Physical(ly) Unclonable Functions - I. Verbauwhede -

Hardware Metering: A Survey - Farinaz Koushanfar

  74 (S), 146 (S)  
16:00-17:00 Coffee Break and Poster Session 2:  173, 53, 151, 2, 184, 205, 13, 165, 155, 153, 182, 50 - Polyd˘me
   
 
18:00-22:00 Gala Dinner

 


 

      Day 3 - Wednesday, May 4th
10:30-12:30 Session 5 - Polyvalente Session 6 - Polyd˘me Session 7
Room CM1368
Circuit Design II -Chaired By: Andre Reis  Asynchronous circuits - Chaired By: Romßn Hermida CAD - Chaired By: Massimo Poncino
51, 140, 204 64, 122, 201 67, 78, 99
76 (S), 208 (S) 124 (S), 212 (S) 152, 188
12:30-14:00 Lunch - Parmentier restaurant
14:00-16:00 Session 8 - Polyvalente - Chaired By: Vincenzo Rana Session 9 - Polyd˘me  
Design of Specific Circuits Design for variability - Chaired By: Ken Stevens  
  4, 66, 90 77, 157
  24 (S), 71 (S) 11 (S), 160 (S), 170 (S)
16:00-16:30 Coffee Break - Polyd˘me
16:30-18:30 Session 10 - Polyvalente Session 11 - Polyd˘me  
Design for reliability - Chaired By: Mehdi Tahoori Circuit Design III - Chaired By: Andreas Burg  
54, 57, 139 15, 41, 52  
113 (S), 119 (S), 174 (S) 94, 120  
18:30-19:00 Closing Remarks - Polyd˘me


 

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GLSVLSI 2011 Webmaster
Theo Theocharides (ttheocharides@ucy.ac.cy), University of Cyprus.